Regviz

Microchip Technology /ATSAME53J18A /PORT /GROUP[1] /DIRCLR

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Interpret as DIRCLR

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https://regviz.com/r/Microchip Technology/ATSAME51J19A/PORT/GROUP[1]/DIRCLR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DIRCLR

Description

Data Direction Clear

Fields

DIRCLR

Port Data Direction Clear

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data